1. Field of the Invention
The present invention relates to a laminated and sintered ceramic circuit board. Specifically, the present invention relates to a laminated and sintered ceramic circuit board having a fine-lined inner layer wiring. Further, the present invention also relates to a semiconductor package including the laminated and sintered ceramic circuit board.
2. Description of the Related Art
Conventionally, semiconductor packages such as so-called flip-chip BGA packages, in which a semiconductor element such as an IC chip and the like is joined on a circuit board by flip-chip mounting or the like and sealed with molding compound such as resin and the like, are commonly used. Resin circuit boards for such semiconductor packages generally consist of multilayer board, in which plural wiring layers and insulation layers are laminated and the wiring layers and through conductor extending through the insulation layers electrically connect electrical terminal(s) disposed on one surface of the board for mounting a semiconductor element or the like and electrical terminal(s) disposed on the other surface of the board for mounting the package on a circuit board such as a mother board (for example, refer to Patent Document 1).
In addition, a package configuration, in which an intermediate circuit board (interposer) with base material such as silicon and ceramic having a coefficient of thermal expansion close to that of a semiconductor element, has been proposed. Such configuration can decrease thermal stress acting between a semiconductor element and an intermediate board in association with temperature alteration. As a result, problems such as breakdown of joining part of a semiconductor element, warpage of an intermediate board due to thermal stress acting on joining part of a semiconductor element can be decreased.
Intermediate circuit boards as described above generally consist of multilayer board, in which insulation layers and wiring layers are laminated, and the wiring layers and through conductor extending through the insulation layers electrically connect electrical terminal(s) disposed on one surface of the board for mounting a semiconductor element or the like and electrical terminal(s) disposed on the other surface of the board for mounting the intermediate board on a package board (resin circuit board) (for example, refer to Patent Documents 2 and 3).
By the way, responding to rising performance and downsizing of electronic devices and the like, the market demand for fast, downsized and short-in-height (thin) circuit element packages for use in various electronic devices (for example, semiconductor packages such as IC packages and the like) has been increasing. As a result, in a circuit element (for example, a semiconductor element such as an IC chip, a resistive element, a capacitative element, an inductor element and the like) constituting a circuit element package, especially in a semiconductor element, demand for fast signal transmission, fine-lined (minute) pitch (interval) between wirings and a thin element continues to increase. Specifically, although the line width and line interval in a wiring layer of a circuit board and intermediate circuit board for a semiconductor package as described above is conventionally required to be around 25 to 150 μm, to respond to the market demand and the increase in number of terminals in a semiconductor element, such as an IC chip, what is needed is circuit boards having more fine-lined line width and line interval of around 5 to 15 μm.